1. Field of the Invention
The present invention relates to a method of defining a conductive layer. More particularly, the present invention relates to a fabrication of a self-aligned hard mask for the formation of the conductive structure.
2. Description of the Related Art
In the fabrication process of an integrated circuitry, a photolithography and etching technique is often used to define the conductive layer in forming a conductive structure such as a gate, a conductive lining or an electrode. As the density of an integrated circuitry is being continuously increased, the critical dimension (CD) of a conductive layer is thus also being decreased. Accordingly, the accuracy in defining the conductive layer also needs to be improved. However, due to limitations imposed by the optical resolution of the photolithography instrument, it is very difficult to achieve a sub-quarter micron CD, for example, a line width less than 0.25 .mu.m.
In the conventional approaches, a complicated mask, such as a phase shifting mask (PSM) and a special illumination method, such as an off-axial illumination (OAI), are successful in pushing the critical dimension beyond the theoretical optical resolution. These approaches, however, are very costly.